タグ: VIA

Why Do Vias Drag Down High-Speed Signals? Starting with Impedance — Parasitics, Stubs, and Return Path

Last Wednesday afternoon, I had a technical sync with a customer who builds servers. The board was 16 layers, 3.2 mm thick, main signals at 25G, with a few pairs running 56G. About halfway through, the SI engineer on the other side put the simulation plot on the screen and asked: for these vias that change layers, are you planning to back-drill them? Our layout colleague said those vias only pass through two layers, so the stub isn’t long — should be fine. The other side didn’t answer, just zoomed in. One via runs from L2 to L15, but the signal actually only uses L2 and L3; more than two […]